CSA Technical Reports Archive

[ Year Index | List All TRs | File a TR ]

(Example: 2005-1 or 2005 1 or 2005)

Recent Technical Reports

[2012-2]
Interdependent Cache Analyses for better precision and Safety
Kartik Nagar & Y N Srikant
[2012-1]
Model-checking bisimulation-based information flow properties for pushdown systems
Deepak D'souza & K.R.Raghavendra
[2011-4]
TCP: Thread Contention Predictor for Parallel Programs
Aparna Mandke, Bharadwaj Amrutur, Y. N. Srikant and Chiranjib Bhattacharyya
[2011-3]
Scalable Working Set Estimation Method for Chip Multicores Using Tagged Bloom Filter And Its Applicaions
Aparna Mandke, Bharadwaj Amrutur & Y N Srikant
[2011-2]
Adaptive Power Optimization of Onchip SNUCA Cacheon Tiled Chip Multicore Architecture using Remap Policy
Aparna Mandke, Bharadwaj Amrutur & Y N Srikant
[2011-1]
A Framework for Online Visualization and Simulation of Critical Weather Applications
Preeti Malakar, Vijay Natarajan & Sathish S Vadhiyar
[2010-8]
Dataflow Analysis for Datarace-free Programs
Arnab De, Deepak D'Souza & Rupesh Nasre
[2010-7]
Applying Genetic Algorithms to Optimize Power in Tiled SNUCA Chip Multicore Architectures
Aparna Mandke, Bharadwaj Amrutur & Y.N.Srikant
[2010-6]
Conflict-Tolerant Specifications for Hybrid Systems
Deepak D' Souza, Madhu Gopinathan, S.Ramesh, Prahladavaradan Sampath
[2010-5]
Design and Implementation of a Flexible and Memory Efficient Operating System for Sensor Nodes
R.C.Hansdah, Deepak Ravi, Sahebrao Sidram Baiger, Amulya Ratna
[2010-3]
Sapphire: A Framework to Explore Power/Performance Implications of Tiled Architecture on Chip Multicore Platform
Aparna Mandke, Keshavan Varadarajan, Basavaraj Talwar, Bharadwaj Amruthur and Y.N.Srikant
[2009-12]
Petrinet based Performance Modeling for Effective DVFS for Multithreaded Programs
Arun R and Y.N.Srikant
[2009-11]
Pragmatic Data Mining: Novel Paradigms for Tackling Key Challenges
Vikas Garg, M.Narasimha Murthy
[2009-10]
Accelerating Multi-core Simulators
Aparna Mandke, Keshavan Varadarajan, Amrutur Bhardwaj, Y.N.Srikant

[2009-9]
Conflict-Tolerant Real-Time Specifications in Metric Temporal Logic
Sumesh Divakaran, Deepak D'Souza, Raj Mohan M.
[2009-8]
Conflict-Tolerant Specifications in Temporal Logic
Sumesh Divakaran, Deepak D'Souza, Raj Mohan M.
[2009-7]
Popular Matchings with variable job capacities
Telikepalli Kavitha and Meghana Nasre
[2009-5]
A Computational Procedure for General-sum Stochastic Games
Prasad H. L., S. Bhatnagar, N. Hemachandra
[2009-4]

[2009-3]

[2009-1]
Analysing Message Sequence Graph Specifications
Joy Chakraborty, Deepak D'Souza, K. Narayan Kumar
[2007-1]
Counter-free input-determined timed automata
Fabrice Chevalier, Deepak D'Souza, Pavithra Prabhakar

Year Index

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 1999 1998 1997 1996 1995 1994 1993 1990
 1989

Hard Copies

Requests for hard copies of technical reports must be addressed to the CSA office.
E-mail address: office@csa.iisc.ernet.in
Postal address: Computer Science and Automation
Indian Institute of Science
Bangalore - 560 012
Karnataka, India.

Please indicate the TR number, the title and the authors.

Problems ? Contact techrep@csa.iisc.ernet.in
[Updated at 2009-10-22T06:42Z]